The present invention generally relates to digital signal processors. More particularly, the invention relates to dedicated subsystem memory buses in digital signal processors. Still more particularly, the invention relates to a coupling of dedicated subsystem memory buses that allows for global memory access from any given subsystem memory bus.
Microprocessors generally include a variety of logic circuits fabricated on a single semiconductor chip. Such logic circuits typically include a processor core, memory, and numerous other support components. Some microprocessors, such as digital signal processors (DSPs) provided by Texas Instruments, may include multiple processor subsystems each having its own processor core. Each processor subsystem includes memory and other support components for the associated processor core.
DSPs are generally sought for computationally intensive tasks because they have hardware specially designed for high performance computing. The processor subsystems which may be found on multi-core DSPs typically have dedicated buses. For example, a processor subsystem may have a dedicated instruction bus that the processor core uses to retrieve program instructions from memory, a dedicated data bus that the processor core uses to retrieve data from memory, and a dedicated direct memory access (DMA) memory bus distinct from the instruction and data buses. The DMA memory bus may be a used to move data in and out of the memory without any intervention from the processor core.
The DMA memory bus in each processor subsystem typically operates under the control of an associated subsystem DMA controller. Because multiple subsystem DMA controllers exist in the DSP device, DMA data transfers between subsystems require cooperation between different DMA controllers. An efficient method for performing such transfers would be desirable.